Sandgate Technologies was founded in 1996 by three engineers—Adrian Port, Jon Wells, and Chad Spackman—who had worked together since 1983 in networking and computing. They were early contributors to Ethernet and later ATM technologies, with experience in high-volume production of board- and system-level networking products.
Sandgate initially focused on the development of custom digital and analog IP for ASIC applications. These designs ranged from memory structures such as RAMs, CAMs, and register files to high-performance analog blocks including DACs, operational amplifiers, and precision bandgap voltage references. During this period, Sandgate also developed and commercialized a dynamic RAM compiler capable of generating custom memory cores for integration in standard planar CMOS processes, eliminating the need for specialized fabrication steps.
In 1999, Sandgate was contracted by Lucent Technologies to design a 1 Gbps TCP/IP offload engine (TOE). To support this effort, Sandgate created a proprietary hardware description language (HDL) and associated compiler. This technology was subsequently licensed to Intel Corporation through Lucent.
In 2004, Sandgate co-founded Cebatech with the goal of developing a 10 Gbps TOE using the C programming language as a hardware design abstraction. A custom compiler was again developed, enabling software engineers trained in hardware concepts to design high-performance silicon. In 2008, Cebatech expanded into compression technology, developing gzip cores in both C and Verilog. The company, later renamed Altior, was acquired by Exar Corporation in 2011.
Following this, Sandgate intensified its focus on high-speed compression IP, specifically deflate and inflate algorithms. Its first customer in this area was Exar. These compression cores, written in SystemVerilog, are currently marketed through CAST Inc. and support both ZLIB and gzip standards. The IP is scalable, supporting single and multi-stream configurations exceeding 100 Gbps.
In 2013, Sandgate engineers were contracted to develop a 750 GH/s SHA-based ASIC for Bitcoin mining. The chip was designed and taped out in under two months, achieving full functionality by November 2013. Fabricated in TSMC’s 28 nm process, the project represents one of Sandgate’s fastest design cycles. The system included a 600-amp, 0.65-volt power supply, also designed by Sandgate.
In 2014, Sandgate reaffirmed its focus on compression IP and formalized its partnership with CAST for global marketing and distribution.